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Posts: 58 | Thanked: 8 times | Joined on Aug 2010
#1
This is a general question, not only related with N900.

Case 1: processor sends 'cmd+add+data' to memory chip via SPI bus.
Firstly the processor has to send cmd code to inform the memory what it wants to do.
And then followed by address, due to memory chip could be randomly accessed.
Finally the processor writes/reads the data to/from the memory chip.
This case is clear to me.

Case 2: processor communicates with WLAN module via SPI bus.
Is it same to case 1?

Case 3: processor communicates with another processor via SPI bus.
What will transmitted on SPI bus? Only data? Because both processor can config its SPI register by itself, it seems no need to send cmd+add.
But if only data is transmitted, and the master processor needs to switch SPI write to SPI read, how can the slave processor knows this?

Thanks!

Last edited by justforfun; 2010-11-04 at 09:22.
 
Posts: 30 | Thanked: 42 times | Joined on Oct 2010 @ Russia
#2
SPI is synchronous and full duplex. When master transmits N bits, it also has to receive N bits from slave.

Some of the bits may be discarded later. In case of mem chip, there is nothing useful master can get while it still hasn't finished transmitting command / address pair.

Usually exchange protocols with chips are described in theirs datasheets. If slave is another processor, then protocol may be arbitrary. For example, if master needs just to read data flow from it's slave, it can write zeros or some junk, and receive data in exchange.
 

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